This app note, discussing the measurement of op-amp settling time, marks the beginning of a career-long assignment (or is it obsession?) with measuring the fine settling time of op amps and data converters. This topic will be revisited in several future app notes. More of a measurement manual than an application note, this note explains the proper instrumentation and technique for a precision settling-time measurement. In particular, Box Section A (starting on page AN10-6), on evaluating and avoiding oscilloscope overload response, should be read twice and then replicated in the lab.
For best circuit, there's really just one choice: Figure 2, combined with Figure 5, make possible the ultra-precision measurement of settling time down to the ten-microvolt level.
There are many worthy quotes of good advice here:
- Unfortunately, oscilloscope overdrive recovery characteristics vary widely among different types and are not usually specified.
- Previously, being able to see an amplifier settle within 50uV wasn't interesting because its thermal drifts swamped this figure.
- To maintain low noise, the bridge's output ground return should be routed away from high current returns such as the 74123's ground pin.
- Some poorly designed amplifiers exhibit a substantial "thermal tail" after responding to an input step. This phenomenon, due to die heating, can cause the output to wander outside desired limited long after settling has apparently occurred.
However, I'm going to pick the best quote for its future value. Best quote (page AN10-3): "Since most amplifiers are not nearly this fast [70 ns], it is reasonable to assume that the circuit will always provide reliable results." Seventy nanoseconds? That may seem really fast in 1985, but stay tuned!
I'm really not sure how the bridges of fig 2 are supposed to operate. From the text, it seems the TTL input (clamped by diodes) drives the bridge, making it switch between -10V and +10V (settling around 10V is emphasized, and he uses low noise 10V references). I was not able to replicate this (either by simulation or breadboarding), as this looks more like a gate bridge (like the one of fig. 5). From my measurements, the clamped voltage at the input of the bridge is simply replicated at the output A when no opamp is connected. This is not exactly the 10V step I was expecting :(
ReplyDeleteMaybe there is a mistake in the diode's orientations in the bridges?