"Power gain stages for monolithic amplifiers." 16 pages.
This app note contains several different discrete output stages for op amps. The three major themes here are high output current, high output (rail-to-rail) swing, and high output voltage.
The first major theme is current boosting. The first circuits (in Figure 1) exploit Widlar's LT1010 power buffer (up to 150 mA), in the application for which it was designed. I really like the circuit in Figure 2, which uses the power-supply terminals for unintended purposes. By sensing the current in the supply pins, you can tell whether the output buffer is sourcing or sinking current, and then drive huge currents (up to 3 amps in the MJE2955 and MJE3055) based on that measurement. The power-supply pins don't always have to connected to just power! This circuit is a nice reminder than buffers are really four-terminal devices (and op amps are five-terminal devices), and all of the terminals can be used in a clever design.
Figure 3 is a fast output stage, using a feed-forward path, similar to Figure 8 in App Note 6. The op amp is being used as a low-frequency error servo, while the feed-forward through the JFET provides the high-frequency path, with a slew rate of one thousand volts per microsecond.
The second major theme is "voltage-gain" stages for nearly rail-to-rail output swing. Using CMOS inverters as "linear" gain elements (as in Figure 5a) weirds me out. I just can't get over my distrust of digital circuits to use them this way. Is the gate behavior in the linear region reliable enough? I guess so. Figure 5b uses bipolar transistors to drive closer to the rails at higher currents. The circuits in Figure 5 are run off a five-volt rail; Figure 7 is another (nearly) rail-to-rail output stage, this time for plus-and-minus 15V rails.
The third major theme is high-voltage output stages, with four example circuits. Figure 9 is roughly similar to some of the other output buffers, but using high-voltage transistors and driving the output node to plus-and-minus 125 volts. (I appreciate the comment that the input common-mode voltage limits require a minimum gain of 11 in the non-inverted connection. In other words, "Remember to do the math!")
Figure 11 is a high-voltage stage, similar to Figure 9, but that uses vacuum tubes. (There aren't many (modern) op-amp circuits that require a 12.6VAC filament supply.) Unfortunately, he calls them "Mr. De Forest's Descendants". I know that he is trying to funny, but De Forest deserves no credit for the invention of the vacuum tube. Don't get me started (instead, I'll just refer you to to Chapter 1 of "The Design of CMOS Radio-Frequency Integrated Circuits" by Thomas Lee).
Figure 13 is an extremely high-voltage output stage, driving up to +1000 volts, but powered just from +28V. The basic trick here is the integral boost switching regulator and the transformer. The current limiting is done by the comparator C1 and the diode network, which brute-forces off the oscillator, the darlington drive, and the drives to the MOSFETs. Finally, Figure 15 is implements a bipolar high-voltage step-up stage, by restoring the "polarity" of the output voltage after the transformer and rectifier with a SCR-based synchronous demodulator.
Best quote (from page AN18-8): "The transistor inverter [in Figure 11] is necessitated because our thermionic friends have no equivalent to PNP transistors."
I'll discuss the box section on frequency compensation next time.