Scope Sunday 39

Currently I am teaching an industry seminar on analog-to-digital converter technology. I was doing a little "pre-assignment" reading (reading text before assigning it to my students) of Chapter 5 in the Analog Devices Data Conversion Handbook. Normally, I wouldn't draw attention to an error in another author's work (I have plenty of my own errors to worry about!), but this one was particularly egregious. On page 5.15 I came across the following discussion of measuring settling time and oscilloscope overdrive:

Modern digital storage scopes (DSOs) and digital phosphor scopes (DPOs) are popular and offer an excellent solution for performing settling time measurements as well as many other waveform analysis functions... These scopes offer real-time sampling rates of several GHz and are much less sensitive to overdrive than older analog scopes or traditional sampling scopes. [pg. 5.15]

Unfortunately, this statement is backwards. Traditional sampling scopes are virtually immune to overdrive (see part three of my series "Vintage scopes are better"), but modern DSOs and DPOs can be just as sensitive to overdrive as older analog scopes.

The text continues:

From a historical perspective, older analog oscilloscopes were sensitive to overdrive and could not be used to make accurate step function settling time without adding additional circuitry. Quite a bit of work was done during the 1980s on circuits to cancel out portions of the step function using Schottky diodes, current sources, etc. [pp. 5.15-16]

This statement seems to be an indictment of Jim's careful settling-time-measurement work in application notes such as App Note 74, but the objection is erroneous. The authors qualify their statement in the first sentence of the following paragraph:

Even with modern DSOs and DPOs, overdrive should still be checked by changing the scope sensitivity by a known factor and making sure that all portions of the waveform change proportionally. Measuring the mid-scale settling time can also subject the scope to considerable overdrive if there is a large glitch. The sensitivity of the scope should be sufficient to measure the desired error band. A sensitivity of 1-mV/division allows the measurement of a 0.25-mV error band if care is taken (one major vertical division is usually divided into five smaller ones, corresponding to 0.2 mV/small division). [pg. 5.16]

The first sentence is good advice (ALWAYS verify your measurement chain!), but the last sentence is terrible advice. You cannot measure the fine settling time of a DAC by simply cranking up the vertical sensitivity. It doesn't matter if your oscilloscope is vintage analog or a modern DSO, if ANY part of the waveform is off the screen, you can't trust the results.

Here's a quick example, using the same TDS3012B (and the same four-volt square-wave oscillator) from my post on aliasing last month. The falling edge of the square wave exhibits a little undershoot. At 500 mV/div, the undershoot appears to be about 800 mV (at the bottom of the screen). Note that some of the four-volt waveform is off the top of the screen.

However, if we move the trace up to the top of the screen, now the undershoot appears to be about 1400 mV (note that the vertical scale is still 500 mV/div).

The only change between these two screenshots is a small rotation of the vertical position knob. Clearly, oscilloscope overdrive is a concern, even in a modern DSO.

App Note 86

A standards lab grade 20-bit DAC with 0.1ppm/°C drift: The dedicated art of digitizing one part per million. 52(?) pages.

The main text of this app note is only four pages long, and there are 48 glorious pages of appendices.

Well, "glorious" is the wrong word. Unfortunately, one of the appendices contains TWENTY-TWO pages of source code (Appendix D). Really? Couldn't Linear Tech have used a smaller font? Printed the code in two landscape columns? Or simply not printed it at all? (Do you think anyone, even one single person, typed in this code and used it? Really?) If we include the source code, this app note is the fourth longest one. However, if we ignore the code, then this app note is only 30 pages long, a little longer than average. It still results in a large appendix-to-main-text ratio, but it's not the less-than-ten-percent ratio we initially suspected...

This app note discusses a 20-bit digital-to-analog converter. The DAC circuit includes an interesting "table-turning" topology: DACs are often used in the feedback path to create a good ADC (for example, as in the successive-approximator topology); in this circuit, a high-quality analog-to-digital converter (the LTC2400) is used in the feedback path to implement a high-quality DAC.

The construction of the 20-bit "slave" DAC is interesting. Jim says, "The sole DAC requirement is that it be monotonic. No other components in the loop need to be stable." The circuit is shown in Figure 2, which using two 16-bit DACs, with eight bits of overlap, and four bits of sub-LSB twiddle.

The results are (briefly) shown on pages 3 and 4, which are heavily footnoted (referring the reader to the numerous appendices). For example, the following quote appears on page 3, with footnote,

Figure 3 is a plot of linearity vs output code. The data shows linearity is within 1ppm over all codes (Establishing and maintaining confidence in a 1ppm linearity measurement is uncomfortably close to the state of the art.).

Appendix A talks a little bit about the history of digital-to-analog conversion and includes a glamor shot of some items from his collection (we saw this photo before in App Note 74). Appendix B lists some of the specifications of the LTC2400 ADC.

Appendix C discusses the operation and use of a Kelvin-Varley divider to verify the linearity of the 20-bit DAC. "The actual construction of a 0.1ppm KVD is more artistry and witchcraft than science." The individual components must be selected (see the table in Figure C4 for the LTC1152 chopper-stabilized op amp) to obtain the necessary performance. Figure C7 shows the complete schematic for the voltage source. The construction of this circuit is a work of art (read the text carefully). "Adjust for 5.000000V at A." That's a lot of zeros! The best quote appears in the footnote on page 11,

The author, wholly unenthralled by web surfing, has spent many delightful hours "surfing the Kelvin." This activity consists of dialing various Kelvin-Varley divider settings and noting monitoring A-to-D agreement within 1ppm. This is astonishingly nerdy behavior, but thrills certain types.

Appendix D contains the source code for the digital comparator. Jim once commented to me, "The summing junction of this circuit is in software. It took a while for me to get my head around it, but it really does work."

Appendix E discusses linearity correction for the LTC2400, and Appendix F discusses improved output-buffer stages. Appendix G shows a gain-of-2000 settling-time measurement circuit, modified from App Note 74.

Appendix H discusses microvolt-level noise measurement. A high-gain preamplifier is necessary, as well as an oscilloscope with a plug-in capable of low-level measurements (2mV/division is not good enough). Figure H3 shows the instrumentation setup, using the same cookie-tin as the noise measurement in App Note 83 Figure 6 (he really did like those cookies!).

Appendix I discusses voltage references for this application, with the LM199A and the LTZ1000A receiving highest marks. Both of these parts use a temperature-control loop to maintain constant temperature on the Zener diode, thus improving the temperature drift to sub-ppm. Figure I2 shows an example circuit for the roll-your-own LTZ1000A. (Bob Dobkin designed these parts. The LM199A is good, but (I suspect) that the loop gain isn't high enough to reject ambient changes in temperature. He got it right in the LTZ1000A with the external loop.)

Appendix J discusses parasitic thermocouples and other construction pitfalls, a topic that he previously discussed in App Note 9 and App Note 28.

Readers finding [Figure J4's] information seemingly academic should be awakened by Figure J5. This chart lists thermoelectric potentials for commonly employed laboratory connectors. Thermocouple activity of some types is more than 20 times greater than others. Be careful!

This app note does end in a cartoon, but I can't reproduce it here. The cartoon demonstrates "one part per million" by printing one million dots. A JPEG on your computer screen doesn't do it justice. Go download the PDF file, print out the last page (on a good printer), grab a magnifying glass, and ponder the real-world difficulty of 20 bits.

App Note 79

"30 nanosecond settling time measurement for a precision wideband amplifier: Quantifying prompt certainty" 32 pages.

While technically the long-awaited update to App Note 10, to be honest, this app note is an abridged and modified version of App Note 74. Here the application is the measurement of amplifier settling time instead of DAC settling time, but the techniques (and the text) are significantly similar. The measurement problem tackled here is actually easier; amplifier settling is determined at the 0.1% point, while 16-bit DAC settling requires measurement of the 0.0015% point. (The amount of laboratory work involved was no less, however; Appendix E is proof of that fact.)

The settling-time measurement circuit is shown in Figure 6 (compare to App Note 74 Figure 6). The modifications for this application include a change to the input drive (to drive a voltage step to the op amp, instead of a digital command to the DAC), removal of the output amplifier, and removal of the temperature-control loop on the diodes (both because 0.0015% accuracy is no longer needed). Also, the sample delay and window generator is now implemented with LT1720 comparators instead of 74HC123 TTL logic.

Also, instead of three alternative measurement methods for comparison (as in App Note 74), he provides just one: the classical sampling oscilloscope. The "essentially identical" results of these two measurement are shown in Figures 18 and 19. Perhaps he felt he has less to prove this time?

The best quote is the app note's conclusion: "Examination of the photographs shows nearly identical settling times and settling waveform signatures. The shape of the settling waveform is essentially identical in both photos. This kind of agreement provides a high degree of credibility to the measured results."

Many of the appendices previously appeared in App Note 74. Appendix A is the same as App Note 74 Appendix B. Appendices C and D are similar to App Note 74 Appendices C and D (with light modifications for the new topology of the settling-time measurement circuit, and for op-amp settling instead of DAC-output-amp settling, respectively).

Appendix B is new, discussing one of his favorite topics, subnanosecond pulse generators. He complains about the prices of current production units ($10,000 to $30,000), discusses his favorite vintage units (HP-8082A, HP-215A, Tek 109, and Tek 111), and then shows his own design in Figure B1. This circuit, as he would likely say, "is the beneficiary of considerable attention over a protracted period of time." It is now loaded with features, including a fully adjustable pulse amplitude, an external input to determine repetition rate, and an output trigger pulse that is settable from before-to-after the main pulse. Figure B4 shows the high-speed pulse in all its glory, measured with a Tek 547 with 1S2 sampling plug-in.

Appendix E discusses breadboard construction (like App Note 74 Appendix G) and includes another photo essay on the construction of the settling-time measurement circuit (Figures E1 to E6), proving that the lab work was exhaustive.

The app note ends with a cartoon, of course. Thirty nanoseconds is hard!

App Note 74 part 2

This app note contains eight appendices (more than half of all the pages), and, as always, the appendices are great stuff.

Appendix A talks a little bit about the history of digital-to-analog conversion and includes a glamour shot of some items from his collection. The Kelvin-Varley divider is very nice. "What Lord Kelvin would have given for a credit card and LTC's phone number."

Appendix B is an updated discussion of oscilloscope-overdrive performance (see App Note 72 Figures 32 to 37 and App Note 47 Figures 45 to 50). Here he has added Figure B1, which compares the topology of various oscilloscopes, and he sings the praises of vintage analog instruments. "Unfortunately, classical sampling oscilloscopes are no longer manufactured, so if you have one, take care of it!" Indeed.

Several of the appendices follow-up on and expand on some issues from the main text. Appendix C discusses calibration of the amplifier delay in the settling-time measurement circuit. Appendix D discusses amplifier compensation (in his usual, seat-of-the-pants way), and the moral of the story seems to be "build it and see." Appendix F shows the circuitry necessary to interface DACs with serial-data interfaces to the settling-time measurement circuit.

Appendix E discusses the special case of using a chopper-stabilized amplifiers and the possible dangers involved therein. The scope trace in Figure E3 is especially frightening, although he admits,

This is admittedly worst case. It can only happen if the DAC slewing interval coincides with the amplifier's internal clock cycle, but it can happen. (Footnote: Readers are invited to speculate on the instrumentation requirements for obtaining Figure E3's photo.)

Such a tease! It'd be nice if he occasionally exposed the trickery behind some of these displays.

Appendix G discusses breadboard construction, and in particular talks about proper steering of the ground currents. Wise advice! As the footnote says, "I do not wax pendantic here. My abuse of this postulate runs deep." This appendix also includes a very nice photo essay on the construction of the settling-time measurement circuit (Figures G1 to G10). I'd love to see some high-resolution color versions of these pictures.

Finally, Appendix H shows some power-gain stages, some of them borrowed from App Note 18 and App Note 47 Appendix C.

The app note concludes with a picture of his work bench instead of a hand-drawn cartoon.

On the left is his Tek 661 sampling scope, with a Tek 454 on top. Next to that is his Tek 547, and in front of the 547 is the General Radio 1422-CL variable capacitor, propped up by a data book. Classic stuff.

(Yes, I really want a 661.)

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Related:

• App Note 74 part 1

App Note 74 part 1

"Component and measurement advances ensure 16-Bit DAC settling time: The art of timely accuracy." 48 pages.

This app note discusses the settling time of digital-to-analog converters. The measurement of settling time is a topic that Jim has discussed before (see Appendix B in App Note 47), but this app note is the most exhaustive treatment so far. This app note is also very, very dense.

There is a plethora of good advice here, included here for several reasons. First of all, the problem is hard. As Jim explains on the first page

In particular, the settling time of the DAC and its output amplifier is extraordinarily difficult to determine to 16-bit resolution... Measuring anything at any speed to 16 bits (0.0015%) is hard.

Secondly, and most importantly, he solves the problem FOUR times. Not content to simply update the settling-time test circuit from App Note 47 (compare App Note 47 Figure B2 with App Note 74 Figure 6), but he also verifies the measurement three more times. One, a bootstrapped clamp in shown in Figure 19. Two, a direct interface to a classical sampling oscilloscope is shown in Figure 26. And three, a unique differential amplifier is employed in Figure 28. These four methods are summarized on page 15.

These results are the fruits of a monumental effort. These four similar scope traces probably represent months of work, and it is an amazing testament to his laboratory skill that they all match so well.

Out of these four measurements, I think the two most interesting ones are the settling-time test circuit and the direct interface to a sampling oscilloscope. The settling-time test circuit in Figure 6 is an update to the circuit discussed in App Note 47. He has made a few improvements to the circuits and replaced a few of the amplifiers with better components. The big improvement is in the choice of the diode bridge; instead of four Schottky diodes, he uses a monolithic array of vanilla diodes with a temperature-control loop. (The temperature control is similar in concept to his temperature-stabilized transistor array in National App Note 299.)

The other interesting measurement uses his Tektronix 661 sampling scope in Figure 26. As he says on page 3, "The only oscilloscope technology that offers inherent overdrive immunity is the classical sampling 'scope." In the footnote, he comments about Appendix B and some of the references and, in particular, "Reference 15 is noteworthy; it is the most clearly written, concise explanation of classical sampling instruments the author is aware of. A 12 page jewel." This reference can still be found on the Tektronix website.

Two more great quotes are worthy of mention. On page 7, he discusses clamp diodes that protect the diode array from damage. In the footnote, he confesses,

This can and did happen. The author was unfit for human companionship upon discovering this mishap. Replacing the sampling bridge was a lengthy and highly emotionally charged task.

On page 17, he discusses the General Radio model 1422-CL precision variable air capacitor. Again, the great quote is the description in the footnote,

A thing of transcendent beauty. It is worth owning this instrument just to look at it. It is difficult to believe humanity could fashion anything so perfectly gorgeous.

There is a similar model capacitor currently listed on eBay for $3,000!

I'll cover the appendices next time.

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Related:

• App Note 74 part 2

App Note 47 part 5

The appendices of App Note 47 are numerous, voluminous, and excellent.

Appendix A is an abridged version of Tektronix's excellent introduction to oscilloscope probes, "The ABCs of Probes". It wasn't written by Jim, of course, but it's still essential reading for the uninitiated. The most recent version is 60 pages long, and can be found on the Tektronix website.

Appendix B is a treatise on measuring settling time, a topic originally discussed in App Note 10. In this treatment, an improved version of the circuits from App Note 10 is shown in Figure B2. Jim's superb attention to instrument calibration shine through here. The operation of the circuit in Figure B2 is explained, and then compared to a single trace sampling oscilloscope (a 556 with a 1S1 plug-in) and the "Harvey Method" (discussed in reference 17). The resultant measurement traces are shown in Figures B3, B4, and B5. A single sentence summarizes the work, "All methods agree on 280ns to 0.01% settling (1mV on a 10V step)." This sentence probably represents months of intense effort. (The "Harvey Method" is several times more complex than Figure B2!)

Appendix C is a discussion of frequency compensation without tears, which was first discussed in box section of App Note 18. This treatment includes significant new material that didn't appear in App Note 18, starting with Figure C7, which discusses several of the application circuits from the main text. As I said back in App Note 18 part 2, I'm not a fan of this treatment. I think the the analytical approaches to feedback systems are superior (the "large body of complex mathematics", as Jim dismisses it). See Reference [38].

Appendix D talks about measuring probe and oscilloscope response, continuing Jim's careful attention to the proper calibration and specification of his instrumentation. The approach here uses the avalanche pulse generator that originally appeared in Figure 27 in App Note 45 (repeated here in Figure D1). Note the effort expended in finding a workable approach here: "A sample of 50 Motorola 2N2369s, spread over a 12 year date code span, yielded 82%." Take a long look at the tight construction in Figure D3 (well, probably Figure F5, to be honest) and imagine building that fifty times!

Appendix E discusses a high-impedance probe circuit, based on the Elantec EL2004 350-MHz FET-input buffer amplifier. The resulting probe has a input capacitance of about 4 pF. Again, the tight construction in Figure E2 is impressive.

Appendix F is a brilliant pictorial essay on construction techniques. Figures F1 through F3 (all captioned "No") display a variety of sins. Figure F2 is of historical interest (I admit to feeling old when I have to first describe wirewrap to my students before I can make fun of it). I had never thought of the clip-lead construction in Figure F3 (a creative disaster). Figures F4 (another 556 picture!) and F5 show the prototype avalanche pulser from Appendix D, constructed in Jim's trademark style. Figure F6 shows the settling-time-measurement circuit from Appendix B. Figures F7 to F24 show various high-speed circuits from the main text, demonstrating the attention to shielding and stray capacitance, and the inattention to layout. Smaller and tighter is better. Figure F23 again shows that sometimes the best cable is no cable. Figure F25 shows the good life.

Appendix G contains the FCC forms appropriate for the circuit in Figure 116. See also the contributions of Prof. C. Berry in Figure 117.

Appendix H contains a brief history of "current feedback" (it's older than you think) and an introduction to "Current Feedback Basics" written by William Gross. "So, while the technique is not new, marketing claims notwithstanding, the opportunity is." (There's also a very good discussion of current-feedback amplifiers in Chapter 25 of Jim's first book, written by Sergio Franco.)

Appendix I is documentation for the "enticing" LTC high-frequency amplifier demo board, that is, the good life as suggested in Figure F25.

Finally, Appendix J ends the publication on a humorous note, if the observations contained therein doesn't strike too close to home. Some days, I just don't think Murphy's Law is all that funny.

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Related:

• App Note 47 part 1
• App Note 47 part 2
• App Note 47 part 3
• App Note 47 part 4
• App Note 47 part 6

App Note 10

"Methods for measuring op amp settling time." 8 pages.

This app note, discussing the measurement of op-amp settling time, marks the beginning of a career-long assignment (or is it obsession?) with measuring the fine settling time of op amps and data converters. This topic will be revisited in several future app notes. More of a measurement manual than an application note, this note explains the proper instrumentation and technique for a precision settling-time measurement. In particular, Box Section A (starting on page AN10-6), on evaluating and avoiding oscilloscope overload response, should be read twice and then replicated in the lab.

For best circuit, there's really just one choice: Figure 2, combined with Figure 5, make possible the ultra-precision measurement of settling time down to the ten-microvolt level.

There are many worthy quotes of good advice here:

• Unfortunately, oscilloscope overdrive recovery characteristics vary widely among different types and are not usually specified.
• Previously, being able to see an amplifier settle within 50uV wasn't interesting because its thermal drifts swamped this figure.
• To maintain low noise, the bridge's output ground return should be routed away from high current returns such as the 74123's ground pin.
• Some poorly designed amplifiers exhibit a substantial "thermal tail" after responding to an input step. This phenomenon, due to die heating, can cause the output to wander outside desired limited long after settling has apparently occurred.

However, I'm going to pick the best quote for its future value. Best quote (page AN10-3): "Since most amplifiers are not nearly this fast [70 ns], it is reasonable to assume that the circuit will always provide reliable results." Seventy nanoseconds? That may seem really fast in 1985, but stay tuned!